The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to measures that should be taken along with the miniaturization of semiconductor devices.
In recent years, there has been a remarkable improvement in the degree of integration of semiconductor devices. As the degree of integration increases, the wiring pitch has been decreasing. As the wiring pitch decreases, there has been a decrease in the minimum width of the interlayer insulator film existing between adjacent ones of contact holes that are running through wiring layers (the width by which the contact holes are separated from each other). In other words, there has been a decrease in the width by which adjacent plugs (made of a conductive material film filling the contact holes so as to connect the wiring layers to one another) are separated from each other.
For example, in a device designed under a 0.18 xcexcm design rule, the wiring pitch is 0.47 xcexcm, and the diameter of a contact hole (plug) is 0.26 xcexcm. Thus, the contact hole separation width (the plug separation width) is 0.21 xcexcm. When manufacturing a semiconductor device having such a small contact hole separation width, it is necessary to form a large number of closely arranged contact holes, which requires an etching mask having a large number of closely arranged contact hole patterns corresponding respectively to the contact holes. However, when a resist film is patterned to produce an etching mask, it is likely that each contact hole pattern is shaped so that an upper portion thereof is larger than a lower portion thereof. In other words, the contact hole pattern is likely to have a tapered cross section. For example, where a contact hole having a diameter of 0.26 xcexcm is formed using a resist film having a thickness of 0.7 xcexcm, if the upper portion of the contact hole pattern is enlarged by 10% (0.026 xcexcm) in diameter during the resist film patterning process, the side surface of the contact hole pattern has an inclination angle (taper angle) of 89xc2x0 with respect to the substrate surface.
Such an contact hole pattern having a tapered cross section is formed when, for example, the focus value is shifted from the intended median during a patterning process in the lithography step. When such an contact hole pattern having a tapered cross section is formed, the thickness of the resist film may decrease from the thickness of the resist film as applied in locations between adjacent contact hole patterns, whereby the adjacent contact hole patterns are connected to each other via the upper portions thereof.
When a contact hole is formed by etching an interlayer insulator film using such a resist film as an etching mask, the contact hole is likely to be shaped so that an upper portion thereof is larger than a lower portion. In other words, a contact hole whose upper portion has a tapered cross section is likely to be formed.
FIG. 11A to FIG. 11D are cross-sectional views and top views schematically illustrating a conventional method for manufacturing a semiconductor device. The cross-sectional views of FIG. 11A, FIG. 11B and FIG. 11D are taken along lines xcex111xe2x80x94xcex111, xcex211xe2x80x94xcex211 and xcex411xe2x80x94xcex411, respectively, which are shown in the corresponding top views.
First, in the step of FIG. 11A, impurity diffusion regions (not shown) are formed in a semiconductor substrate 1 to form switching transistors (not shown), etc. Then, a wiring layer 2 is formed on the semiconductor substrate 1, and an interlayer insulator film 3 is formed thereon.
Then, the interlayer insulator film 3 is flattened by a chemical mechanical polishing (hereinafter referred to as xe2x80x9cCMPxe2x80x9d) method, and a resist film 4 is formed thereon. Then, contact hole patterns 5 corresponding respectively to contact holes are formed in the resist film 4 by photolithography. Ideally, each contact hole pattern 5 has a cross section such that a side wall 6 thereof is perpendicular to the substrate surface. In practice, however, the cross section of the contact hole pattern 5 is likely to be slightly tapered in the forward direction as described above.
Then, in the step of FIG. 11B, contact holes 7 are formed by etching the interlayer insulator film 3 using the resist film 4 as an etching mask. After the etching process, an upper portion of each contact hole 7 is tapered.
Then, in the step of FIG. 11C, a conductive material film 8 (e.g., polysilicon, tungsten, copper, etc.) is deposited on the substrate.
Then, in the step of FIG. 11D, the conductive material film 8 is flattened by a CMP method until the surface of the interlayer insulator film 3 is exposed, thus forming plugs 9 which are made of the conductive material film 8 filling the contact holes 7.
A semiconductor device 100 is produced through these steps.
However, with the conventional method for manufacturing a semiconductor device as described above, adjacent contact holes may be connected to each other via the upper portions thereof, as illustrated in the plan view of FIG. 11B. Therefore, adjacent plugs are likely to be connected to each other via the upper portions thereof, as illustrated in the plan view of FIG. 11D, thereby causing a short-circuit between the plugs.
The present invention has been made to solve the problem described above, and has an object to provide a semiconductor device having a small wiring pitch and a method for manufacturing the same.
A method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) forming a plurality of contact holes running through the interlayer insulator film to reach respective ones of the plurality of conductive layers, each of the contact holes having a tapered portion (faceting portion) at an upper end thereof; (c) depositing a conductive material film on the interlayer insulator film so as to fill the plurality of contact holes; (d) removing the conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs made of the conductive material film filling the plurality of contact holes; and (e) removing a portion of the interlayer insulator film, which has been exposed in the step (d), so as to remove the tapered portions.
In this way, even if adjacent contact holes are connected to each other via the upper portions thereof in the step (b) of forming the plurality of contact holes, it is possible to prevent the plugs filling the contact holes from being short-circuited to each other.
Another method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) depositing a first conductive material film on the substrate; (c) forming a plurality of contact holes running through the first conductive material film and the interlayer insulator film to reach respective ones of the plurality of conductive layers; (d) depositing a second conductive material film on the first conductive material film so as to fill the plurality of contact holes; and (e) removing the second conductive material film and the first conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs which are made of the conductive material film filling the plurality of contact holes.
In this way, even if adjacent contact holes are connected to each other via the upper portions thereof in the step of forming the contact holes, it is possible to prevent the plugs filling the contact holes from being short-circuited to each other. Particularly, adjacent contact holes can be separated from each other only by flattening the first and second conductive material films. Thus, the interlayer insulator film is not flattened by a method that is adjusted to conditions according to the first and second conductive material films. Therefore, the method is particularly suitable for cases where flattening the interlayer insulator film by a method that is adjusted to conditions according to the first and second conductive material films may cause problems.
Still another method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) forming a plurality of contact holes running through the interlayer insulator film to reach respective ones of the plurality of conductive layers, each of the contact holes having a tapered portion at an upper end thereof; (c) removing a portion of the interlayer insulator film so as to remove the tapered portions; (d) depositing a conductive material film on the interlayer insulator film so as to fill the plurality of contact holes; and (e) removing the conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs which are made of the conductive material film filling the plurality of contact holes.
A portion of the interlayer insulator film is removed so as to remove the tapered portions, thereby separating adjacent contact holes from each other, before depositing the conductive material film. Therefore, it is possible to prevent the plugs filling the contact holes from being short-circuited to each other.
In the step (c), the tapered portions may be removed by etching or chemical mechanical polishing.
Still another method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) forming a plurality of contact holes running through the interlayer insulator film to reach respective ones of the plurality of conductive layers, each of the contact holes having a tapered portion at an upper end thereof; (c) forming an organic material film so as to fill the plurality of contact holes; (d) removing a portion of the interlayer insulator film so as to remove the tapered portions; (e) removing the organic material film; (f) depositing a conductive material film on the interlayer insulator film so as to fill the plurality of contact holes; (g) removing the conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs which are made of the conductive material film filling the plurality of contact holes.
A portion of the interlayer insulator film is removed so as to remove the tapered portions, thereby separating adjacent contact holes from each other, before depositing the conductive material film. Therefore, it is possible to prevent the plugs filling the contact holes from being short-circuited to each other. Particularly, when the entire surface of the substrate is flattened by a CMP method, a slurry may remain inside the contact holes. Removal of the slurry may be difficult when the contact hole has a high aspect ratio. However, according to the present invention, the slurry used in the CMP method will not remain in the contact holes because the contact holes are filled with the organic material film. Thus, it is possible to suppress/prevent a slurry from existing, as an impurity, in the conductive material film when forming the plugs.
In the step (d), the tapered portions may be removed by etching or chemical mechanical polishing.
Still another method for manufacturing a semiconductor device of the present invention includes the steps of: (a) depositing an interlayer insulator film on a substrate including a plurality of conductive layers; (b) applying a resist film on the interlayer insulator film and patterning the resist film so as to from an etching mask having a plurality of contact hole patterns therein; (c) performing an etching process using the etching mask so as to form a plurality of contact holes running through the interlayer insulator film to reach respective ones of the plurality of conductive layers; (d) depositing a conductive material film on the interlayer insulator film so as to fill the plurality of contact holes; and (e) removing the conductive material film until a surface of the interlayer insulator film is exposed so as to form a plurality of plugs which are made of the conductive material film filling the plurality of contact holes, wherein in the step (b), the resist film is applied to a thickness such that upper ends of the plurality of contact holes will not be tapered in the step (c).
According to the method, the resist film is applied to a thickness such that the upper ends of the plurality of contact holes will not be tapered in the step (c). Thus, adjacent contact holes are not connected via the upper portions thereof in the step of forming the contact holes by etching. In this way, it is possible to avoid an additional step of separating adjacent contact holes that have been connected to each other via the upper portions thereof, which would otherwise be required before or after forming a conductive material film so as to fill the contact holes. Therefore, it is possible to suppress/prevent a short-circuit between plugs while reducing the manufacturing cost.
Preferably, in the step (c), a ratio of an etch rate for the interlayer insulator film with respect to an etch rate for the resist film located on a side wall of each of the contact holes is 3.5 or more.
A semiconductor device of the present invention includes: a substrate including a plurality of conductive layers; an interlayer insulator film provided on the substrate; and a plurality of plugs running through the interlayer insulator film to reach respective ones of the plurality of conductive layers, wherein any adjacent two of the plurality of plugs are separated from each other by the interlayer insulator film, and a minimum width of the interlayer insulator film existing between two adjacent plugs is 0.30 xcexcm or less.
In this way, it is possible to obtain a semiconductor device in which a short-circuit between plugs is suppressed/prevented.